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CMTI(kV/us) : 18kV/us
Default Output : -
Number of Forward Channels : 3
Number of Reverse Channels : 1
Operating Temperature : -40℃~+100℃
Description : SOIC-16-300mil Digital Isolators
Mfr. Part # : HCPL-902J
Model Number : HCPL-902J
Package : SOIC-16-300mil
The Broadcom HCPL-90xx and HCPL-09xx series are high-speed CMOS digital isolators designed for robust performance and excellent transient immunity. Featuring a symmetric magnetic coupling barrier, these isolators offer industry-leading speed with a typical pulse width distortion of 2 ns, propagation delay skew of 4 ns, and a data rate of 100 Mbaud. They are available in single-channel, dual-channel (unidirectional and bidirectional), and quad-channel configurations, providing high channel density for isolating data conversion devices, parallel buses, and peripheral interfaces. These devices are suitable for applications such as digital fieldbus isolation, multiplexed data transmission, computer peripheral interfaces, high-speed digital systems, isolated data interfaces, and logic level shifting. They are specified for operation over a wide temperature range of 40C to +100C.
| Model Series | Channel Configuration | Package Type | Data Rate | Pulse Width Distortion (Typ.) | Propagation Delay Skew (Typ.) | Isolation Voltage (RMS) | Temperature Range |
|---|---|---|---|---|---|---|---|
| HCPL-90xx / HCPL-09xx | Single | 8-pin PDIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Dual (Unidirectional) | 8-pin DIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Dual (Bidirectional) | 8-pin DIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (Unidirectional) | 16-pin SOIC (Wide Body), 16-pin SOIC (Narrow Body) | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (2 channels one direction, 2 opposite) | 16-pin SOIC (Wide Body), 16-pin SOIC (Narrow Body) | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (1 channel one direction, 3 opposite) | 16-pin SOIC (Wide Body), 16-pin SOIC (Narrow Body) | 100 Mbaud | 2 ns | 4 ns | 2500V | -40C to +100C |
| Parameter | Min. | Typ. | Max. | Unit | Test Conditions |
|---|---|---|---|---|---|
| Supply Voltage | 3.0 | 5.5 | V | Ambient Operating Temperature | |
| Ambient Operating Temperature | -40 | 100 | C | ||
| Common Mode Rejection | 15 | kV/s | min. | ||
| Propagation Delay (Max.) | 15 | ns | |||
| Pulse Width Distortion (Max.) | 3 | ns | |||
| Propagation Delay Skew (Max.) | 6 | ns | |||
| Output Rise Time (Typ.) | 2 | 4 | ns | (10% to 90%) | |
| Output Fall Time (Typ.) | 2 | 4 | ns | (10% to 90%) | |
| Enable to Output Delay (Typ.) | 3 | 5 | ns | High to High Impedance / Low to High Impedance / High Impedance to High / High Impedance to Low | |
| Channel-to-Channel Skew (Typ.) | 2 | 3 | ns | (Dual and Quad Channels) | |
| Common Mode Transient Immunity (Max.) | 15 | 18 | kV/s | (Output Logic High or Low) |
Power consumption is frequency-dependent and independent of mark-to-space ratio. Approximate supply current per channel: I(Input) = 40(f/fmax)(1/4) mA, where f = operating frequency, fmax = 50 MHz.
Designers should consider including an initialization signal due to potential ambiguous output states during power up, shutdown, or power loss sequencing.
Requires low ESR 47 nF ceramic capacitors for power supply decoupling. Ground planes for GND1 and GND2 are recommended for data rates above 10 Mb/s. Capacitors should be placed close to VDD pins.
Key parameters for signal integrity and data rate capability. Propagation delay measures signal transit time. Pulse Width Distortion (PWD) is the difference between high-to-low and low-to-high propagation delays. Propagation Delay Skew (tPSK) and Channel-to-Channel Skew (tCSK) are critical for parallel data transmission synchronization.
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CMOS digital isolators Broadcom HCPL 902J supporting unidirectional and bidirectional data channels Images |